PC Engines apu coreboot Open Source Firmware v4.12.0.6

Key changes

Mainline:

  1. Rebased with official coreboot repository commit 43439f6.
  2. Fixed runtime configuration allowing to reverse PCI addressing order. Previously it changed only addressing of mPCIe devices, now NICs are reversed as well. Which means that NIC with WoL should be the first booting in iPXE.

Legacy:

  1. Fixed runtime configuration allowing to reverse PCI addressing order. Previously it changed only addressing of mPCIe devices, now NICs are reversed as well. Which means that NIC with WoL should be the first booting in iPXE.

Statistics

Files Changed

The chart shows the total files changed from release tag against the rebase point of given release specified in CHANGELOG (CHANGELOG.md and gitlab-ci.yml excluded from statistics). Check the statistics with:

git diff --stat 43439f6 ':(exclude).gitlab-ci.yml' ':(exclude)CHANGELOG.md' ':(exclude).gitlab-ci/regression.sh'

108 files changed, 4214 insertions(+), 452 deletions(-)

Process of mainlining

The chart represents the total line added and deleted on the PC Engines coreboot fork against the rebase point for a given release.

Three files have not been included in the diff as mentioned above since they are not a part of coreboot tree.

Testing

Mainline test results

  • Mainline:
    • PASSED: 574 (-43)
    • FAILED: 13 (+6)
    • PASSED [%]: 97.74 (-1.15%)

Legacy test results

  • Legacy:
    • PASSED: 389 (+4)
    • FAILED: 4 (-3)
    • PASSED [%]: 98.97 (+0.79%)

Key Changes in testing

  1. Validation infrastructure has been updated. Robot Framework has been rebased with official commit 535d9a1.

  2. apu6a has not been tested in this iteration, which significantly decreased the total number of tests.

  3. New USB sticks had been added, which not necessarily have a good impact on the regression tests results. Increased FAIL rate is caused mainly by this change.

Binaries

Mainline

See how to verify the signatures on asciinema

Legacy

See how to verify the signatures on asciinema

What we planned

  1. Improve the support of TPM2 in coreboot and SeaBIOS. Currently there is only the TCPA (TPM1.2) log support in coreboot. Additionally SeaBIOS overwrites existing entries in TPM2 log area. cbmem utility also lacks support for displaying TPM2 log area.

    WORK IN PROGRESS

  2. Reorganize runtime configuration by making it persistent across updates and accessible from user space. Also prepare a tool for offline binary modification.

    VERIFICATION

  3. Vital Product Data (VPD) support. User will have possibility to store and change VPD configuration in Read-Write section of SPI flash. Moreover, default VPD keys and values will be stored in Read-Only region to protect data against corruption. Also, sortbootorder runtime configuration will be stored in VPD Read-Write section, so access to it will be possible in OS via dedicated util.

    VERIFICATION

Coming soon

Feature and improvements on the roadmap:

  1. Improve the support of TPM2 in coreboot and SeaBIOS. Currently there is only the TCPA (TPM1.2) log support in coreboot. Additionally SeaBIOS overwrites existing entries in TPM2 log area. cbmem utility also lacks support for displaying TPM2 log area.
  2. Reorganize runtime configuration by making it persistent across updates and accessible from user space. Also prepare a tool for offline binary modification.
  3. Vital Product Data (VPD) support. User will have possibility to store and change VPD configuration in Read-Write section of SPI flash. Moreover, default VPD keys and values will be stored in Read-Only region to protect data against corruption. Also, sortbootorder runtime configuration will be stored in VPD Read-Write section, so access to it will be possible in OS via dedicated util.