PC Engines apu coreboot Open Source Firmware v4.10.0.3
PC Engines apu coreboot Open Source Firmware v4.10.0.3
Key changes
Mainline:
- Rebased with official coreboot repository commit 2d90cb1.
- Added ZIP packages with released coreboot image, SHA256 file and SHA256 signature for Windows users.
coreboot community
Patches sent for review:
- Default SATA in AHCI mode for apu2
- Handle USB keyboards function keys in Memtest86+
- Implement bootblock in C environment
- Adapt romstage to bootblock in C environment
- Fix firmware table lookup for AMD FW
- Move AMD FW higher in CBFS
Statistics
The chart shows the total files changed from release tag against the rebase point of given release specified in CHANGELOG (CHANGELOG.md and gitlab-ci.yml excluded from statistics). Check the statistics with:
git diff --stat 2d90cb1 ':(exclude).gitlab-ci.yml' ':(exclude)CHANGELOG.md'
93 files changed, 2901 insertions(+), 213 deletions(-)
The chart represents the total line added and deleted on the PC Engines coreboot fork against the rebase point for a given release. Check the statistics with:
git diff --stat 2d90cb1 ':(exclude).gitlab-ci.yml' ':(exclude)CHANGELOG.md'
93 files changed, 2901 insertions(+), 213 deletions(-)
Two files have not been included in the diff as mentioned above since they are not a part of coreboot tree.
Testing
-
PC Engines hardware configuration matrix - hardware configurations available for testing in 3mdeb laboratory.
-
PC Engines release validation results - please note there are separate sheets for each board-release.
There are no test changes in this release.
- Mainline:
- PASSED: 428 (+4)
- FAILED: 9 (-4)
- PASSED [%]: 97.94% (+0.56%)
This release does not have tests changes, therefore there is slight difference
in the aggregated statistics. Slightly better overall PASSED tests percentage
results from the on-going random USB detection problem, whether it will affect
the current iteration or not.
Binaries
Mainline
See how to verify the signatures on asciinema
What we planned
-
Improve the support of TPM2 in coreboot and SeaBIOS. Currently there is only the TCPA (TPM1.2) log support in coreboot. Additionally SeaBIOS overwrites existing entries in TPM2 log area.
cbmemutility also lacks support for displaying TPM2 log area.WORK IN PROGRESS
-
Validate ESXi 6.7. We have got information that booting ESXi 6.7 U2 fails on apu2 and are investigating the issue.
WORK IN PROGRESS
-
Reorganize runtime configuration by making it persistent across updates and accessible from user space. Also prepare a tool for offline binary modification.
WORK IN PROGRESS
-
Vital Product Data (VPD) support. User will have possibility to store and change VPD configuration in Read-Write section of SPI flash. Moreover, default VPD keys and values will be stored in Read-Only region to protect data against corruption. Also, sortbootorder runtime configuration will be stored in VPD Read-Write section, so access to it will be possible in OS via dedicated util.
WORK IN PROGRESS
Coming soon
Feature and improvements on the roadmap:
- Improve the support of TPM2 in coreboot and SeaBIOS. Currently there is only
the TCPA (TPM1.2) log support in coreboot. Additionally SeaBIOS overwrites
existing entries in TPM2 log area.
cbmemutility also lacks support for displaying TPM2 log area. - Validate ESXi 6.7. We have got information that booting ESXi 6.7 U2 fails on apu2 and are investigating the issue.
- Reorganize runtime configuration by making it persistent across updates and accessible from user space. Also prepare a tool for offline binary modification.
- Vital Product Data (VPD) support. User will have possibility to store and change VPD configuration in Read-Write section of SPI flash. Moreover, default VPD keys and values will be stored in Read-Only region to protect data against corruption. Also, sortbootorder runtime configuration will be stored in VPD Read-Write section, so access to it will be possible in OS via dedicated util.